[rescue] Help with V210 rescue

[Zach Lowry]

I just got a Fire V210, rescued from a friend. I get the following  
when I power it up. For some reason, I feel like it should be  
possible to fix this system. I've tried removing CPUs and Memory, to  
no avail. Any ideas from anyone on the list on how to make this  
system work? I've yet to bring it up to the OBP, it always just drops  
me into the debugger.

Thanks.


ALOM BOOTMON v1.5.1
ALOM Build Release: 001
Reset register: e0000000 EHRS ESRS LLRS


ALOM POST 1.0


Dual Port Memory Test, PASSED.

TTY External - Internal Loopback Test
TTY External - Internal Loopback Test, PASSED.

TTYC - Internal Loopback Test
TTYC - Internal Loopback Test, PASSED.

TTYD - Internal Loopback Test
TTYD - Internal Loopback Test, PASSED.

Memory Data Lines Test
Memory Data Lines Test, PASSED.

Memory Address Lines Test
   Slide address bits to test open address lines
   Test for shorted address lines
Memory Address Lines Test, PASSED.

Memory Parity Test
Memory Parity Test, PASSED.

Boot Sector FLASH CRC Test
Boot Sector FLASH CRC Test, PASSED.


Return to Boot Monitor for Handshake
ALOM POST 1.0
    Status = 00007fff

Returned from Boot Monitor and Handshake


Clearing Memory Cells
Memory Clean Complete


Loading the runtime image...
SC Alert: SC System booted.

ALOM - POST run incomplete previously, no POST this time

ALOM BOOTMON v1.5.1
ALOM Build Release: 001
Reset register: e0000000 EHRS ESRS LLRS


Check for Handshake


Returned from Boot Monitor and Handshake


Clearing Memory Cells
Memory Clean Complete


Loading the runtime image...
SC Alert: SC System booted.

SC Alert: Host System has Reset


Sun(tm) Advanced Lights Out Manager 1.5.1 (hostname)


VxDiag not performed.

Enter #. to return to ALOM.
1>
1>ERROR: TEST = Power on Reset Initialization
1>H/W under test = Motherboard, CPU (system initialization)
1>Repair Instructions: Replace items in order listed by 'H/W under  
test' above.
1>MSG = ERROR: Slave timeout waiting for 0 to finish, offlining cpu!
1>END_ERROR

1>Start Selftest.....
1>
1>ERROR: TEST =
1>H/W under test = Motherboard, CPU (system initialization)
1>Repair Instructions: Replace items in order listed by 'H/W under  
test' above.
1>MSG =


         ERROR:2 AFSR Error 00020000.00040000, AFAR 00000000.00000000.


1>END_ERROR

1>
1>ERROR: TEST =
1>H/W under test = Motherboard, CPU (system initialization)
1>Repair Instructions: Replace items in order listed by 'H/W under  
test' above.
1>MSG =


         ERROR:0 AFSR Error 00020000.00040000, AFAR 00000000.00000000.


1>END_ERROR

1>
1>WARNING: TEST =
1>H/W under test = Motherboard, CPU (system initialization)
1>MSG =         AFSR error before running test .
1>END_WARNING

1>CPUs present in system: 1
1>
1>ERROR: TEST =
1>H/W under test = Motherboard, CPU (system initialization)
1>Repair Instructions: Replace items in order listed by 'H/W under  
test' above.
1>MSG =


         ERROR:3 AFSR Error 00020000.00040000, AFAR 00000000.00000000.


1>END_ERROR

1>
1>ERROR: TEST =
1>H/W under test = Motherboard, CPU (system initialization)
1>Repair Instructions: Replace items in order listed by 'H/W under  
test' above.
1>MSG = Fatal CPU error on master, rolling over to new master.
1>END_ERROR

1>ERROR:
1>      POST toplevel status has the following failures:
1>              CPU0
1>              CPU1
1>              Motherboard
1>END_ERROR

1>
1>ERROR:        No good CPUs OR CPUs with good memory left.  Calling  
debug menu
SC Alert: CPU0 has been failed by POST

SC Alert: CPU1 has been failed by POST

SC Alert: Motherboard has been failed by POST
.
1>      0       Peek/Poke interface
1>      1       Dump CPU Regs
1>      2       Dump Valid L2$
1>      3       Dump Trap Table
1>      4       Dump Mem Controller Regs
1>      5       Dump Valid DMMU entries
1>      6       Dump IMMU entries
1>      7       Dump Mailbox
1>      8       Dump IO-Bridge regs unit 0
1>      9       Dump IO-Bridge regs unit 1
1>      a       Allow other CPUs to print
1>      b       Do soft reset
1>      ?       Help
1>
1>Selection: