[rescue] A5000 questions...

[Dave McGuire]

On Wednesday, August 6, 2003, at 06:12 PM, Curtis H. Wilbar Jr. wrote:
>>>> OK, since the document for the 501-5202 mentions the A5k, I guess it
>>>> works.  Here, I'd been under the impression that Sun's wierd 25MByte
>>>> existed for sbus.
>>>
>>> I think that is the bandwidth for an SBUS card....  that is 
>>> independent
>>> of the bandwidth of the interface is supports (although it is a 
>>> choking
>>> point for external interfaces with higher bandwidth than the sbus).
>>
>>   Uhhhhhhhhh, NO.  Sbus is usually clocked at 25MHz and it's four 
>> bytes
>> wide, making it about the equivalent in performance to baseline PCI.
>> The faster (33MHz) baseline PCI clock advantage is eaten up by the way
>> sbus starts and stops transfers...with sbus, one transfer can start on
>> the very next cycle after the last transfer ends, but with PCI there
>> are intervening arbitration cycles.
>
> Yikes... that's it... 25MHZ !  Oops !
>
> The SS1 had a 20MHZ sbus I think... and in the SS10/20 I think the
> sbus is 20mhz when your doing 40mhz mbus, and 25mhz when doing 50mhz
> mbus.... correct ?

   That rings true with my memory.  I think the SLC's sbus (though it 
had no actual "slots") ran at 20MHz also.

>>   First-generation PCI, Sbus, and DEC's TurboChannel are pretty much
>> equivalent in performance, if my tired brain is remembering all the
>> numbers correctly.
>
> big oops there... thanks for catching me Dave...

   My pleasure. 8-)   [dave ducks again]

       -Dave

--
Dave McGuire                 "You don't have Vaseline in Canada?"
St. Petersburg, FL                     -Bill Bradford