[SunRescue] System Board trouble on SUN SC2000E ?

[Adam Skaffloth]

I have a SparcCenter 2000E with 10 Boards,
but I can only get it to work with the first 8 boards in,
If I put any of the last 2 in I get funny POST errors,
most compaining about MQH (Memory Queue Handler ???) on board 0.

Any help appreciated, I tried swapping bards around but to no success. Same
Error.
I swapped Main Board (0), smae error.

Anyone with experience ?

This is the output from the POST (Power On Self Test):

 *** Toggle Verbose Flag = 1 ***

0A>    BW Tag RAM 6N Test
0A>BW1 Regs Test
0A>    C_1 BW
0A>    BW Registers Test
0A>    Timers and Interrupts Test
0A>    BW Tag RAM 6N Test
0A>BW Interleave Test
0A>    C_2 BW
0A>C2 BW Tags Test
0A>C0 MQH Test
0A>    C_0 BW,MQH
0A>    MQH Registers Test
0A>    MQH Initialization
0A>    Enable ECC
0A>    Memory Test
0A>    Config Memory Available
0A>     Config Board = 128MB, Config Total = 128MB
0A>C0 IOC Test
0A>    C_0 BW,IOC
0A>    IOC Registers Test
0A>    IOC XDBus Tags Test
0A>    IOC Sbus Tags Test
0A>    IOC Cache RAM Test
0A>C0 SBI Test
0A>    SBI Initialization
0A>    SBI Registers Test
0A>    SBI Initialization
0A>    SBus Interrupts Test
0A>C0 SBUS Cards Test
0A>    SBI Initialization
0A>    Checking for SBUS cards
0A>Board 0 Slot 0 occupied
0A>Board 0 Slot 1 occupied
0A>Board 0 Slot 3 occupied
0A>C0 XPT Test
0A>C0 BW MQH Consistency Test
0A>C0 IOC MQH Consistency Test
0A>C0 BW IOC Consistency Test
0A>SPARC Module Board Master Test
0A>    C_0 BW,MQH
0A>    CPU and Cache Test
0A>C1 MQH Test
0A>    C_1 BW,MQH
0A>    MQH Registers Test
0A>    MQH Initialization
0A>    Enable ECC
0A>    Memory Test
0A>    Config Memory Available
0A>     Config Board = 128MB, Config Total = 128MB
0A>C1 IOC Test
0A>    C_1 BW,IOC,MQH
0A>    IOC Registers Test
0A>    IOC XDBus Tags Test
0A>    IOC Sbus Tags Test
0A>    IOC Cache RAM Test
0A>C1 SBI Test
0A>    SBI Initialization
0A>    SBI Registers Test
0A>    SBI Initialization
0A>    SBus Interrupts Test
0A>C1 SBUS Cards Test
0A>    SBI Initialization
0A>    Checking for SBUS cards
0A>Board 0 Slot 0 occupied
0A>Board 0 Slot 1 occupied
0A>Board 0 Slot 3 occupied
0A>C1 BW MQH Consistency Test
0A>C1 IOC MQH Consistency Test
0A>C1 BW IOC Consistency Test
0A>C2 IOC Test
0A>    C_2 BW,IOC
0A>C2 SBUS Cards Test
0A>    SBI Initialization
0A>    Checking for SBUS cards
0A>Board 0 Slot 0 occupied
0A>Board 0 Slot 1 occupied
0A>Board 0 Slot 3 occupied
0A>Bus Ring Test
0A>    Verify Bus Ring Test
0A>C0 BP Check Test
0A>    Wait for Alt
0A>    XDBus setup C_0
0A>    C0 Backplane Check Test
0A>C0 Exit LB Test
0A>    Loopback Exit C_0 Test
0A>C1 BP Check Test
0A>    Wait for Alt
0A>    XDBus setup C_1
0A>    C1 Backplane Check Test
0A>C1 Exit LB Test
0A>    Loopback Exit C_1 Test
0A>Board 6 C0 NPB Loopback Exit Test
0A>    Board 6 Loopback Exit Test
0A>    Board 6 Marking NPB Test
0A>Board 6 C0 NPB MQH Test
0A>    Board 6 Check BDA
0A>    Board 6 C_0 NPB MQH
0A>    Board 6 MQH Registers Test
0A>    Board 6 MQH Initialization
0A>    Board 6 Enable ECC
0A>    Board 6 Memory Test
0A>    Board 6 Config Memory Available
0A>     Config Board = 0MB, Config Total = 128MB
0A>Board 6 C0 NPB IO Ring Test
0A>    Board 6 Verify IO Ring Test
0A>Board 6 C0 NPB IO Test
0A>    Board 6 Check BDA
0A>    Board 6 C_0 NPB IOC
0A>    Board 6 IOC Registers Test
0A>    Board 6 IOC XDBus Tags Test
0A>    Board 6 IOC Sbus Tags Test
0A>    Board 6 IOC Cache RAM Test
0A>Board 6 C0 NPB SBI Test
0A>    Board 6 SBI Initialization
0A>    Board 6 SBI Registers Test
0A>    Board 6 SBI Initialization
0A>    Board 6 SBus Interrupts Test
0A>Board 6 C0 NPB SBUS Cards Test
0A>    Board 6 SBI Initialization
0A>    Board 6 Checking for SBUS cards
0A>Board 6 C0 NPB Delay Test
0A>    Board 6 TOD Delay
0A>    Board 6 TOD Delay
0A>Board 6 C0 NPB XPT Test
0A>Board 7 C0 NPB Loopback Exit Test
0A>    Board 7 Loopback Exit Test
0A>    Board 7 Marking NPB Test
0A>Board 7 C0 NPB MQH Test
0A>    Board 7 Check BDA
0A>    Board 7 C_0 NPB MQH
0A>    Board 7 MQH Registers Test
0A>    Board 7 MQH Initialization
0A>    Board 7 Enable ECC
0A>    Board 7 Memory Test
0A>    Board 7 Config Memory Available
0A>     Config Board = 0MB, Config Total = 128MB
0A>Board 7 C0 NPB IO Ring Test
0A>    Board 7 Verify IO Ring Test
0A>Board 7 C0 NPB IO Test
0A>    Board 7 Check BDA
0A>    Board 7 C_0 NPB IOC
0A>    Board 7 IOC Registers Test
0A>    Board 7 IOC XDBus Tags Test
0A>    Board 7 IOC Sbus Tags Test
0A>    Board 7 IOC Cache RAM Test
0A>Board 7 C0 NPB SBI Test
0A>    Board 7 SBI Initialization
0A>    Board 7 SBI Registers Test
0A>    Board 7 SBI Initialization
0A>    Board 7 SBus Interrupts Test
0A>Board 7 C0 NPB SBUS Cards Test
0A>    Board 7 SBI Initialization
0A>    Board 7 Checking for SBUS cards
0A>Board 7 C0 NPB Delay Test
0A>    Board 7 TOD Delay
0A>    Board 7 TOD Delay
0A>Board 7 C0 NPB XPT Test
0A>Board 8 C0 NPB Loopback Exit Test
0A>    Board 8 Loopback Exit Test
0A>    Board 8 Marking NPB Test
0A>Board 8 C0 NPB MQH Test
0A>    Board 8 Check BDA
0A>    Board 8 C_0 NPB MQH
0A>    Board 8 MQH Registers Test
0A>    Board 8 MQH Initialization
0A>    Board 8 Enable ECC
0A>    Board 8 Memory Test
0A>    Board 8 Config Memory Available
0A>     Config Board = 0MB, Config Total = 128MB
0A>Board 8 C0 NPB IO Ring Test
0A>    Board 8 Verify IO Ring Test
0A>Board 8 C0 NPB IO Test
0A>    Board 8 Check BDA
0A>    Board 8 C_0 NPB IOC
0A>    Board 8 IOC Registers Test
0A>    Board 8 IOC XDBus Tags Test
0A>    Board 8 IOC Sbus Tags Test
0A>    Board 8 IOC Cache RAM Test
0A>Board 8 C0 NPB SBI Test
0A>    Board 8 SBI Initialization
0A>    Board 8 SBI Registers Test
0A>    Board 8 SBI Initialization
0A>    Board 8 SBus Interrupts Test
0A>Board 8 C0 NPB SBUS Cards Test
0A>    Board 8 SBI Initialization
0A>    Board 8 Checking for SBUS cards
0A>Board 8 C0 NPB Delay Test
0A>    Board 8 TOD Delay
0A>    Board 8 TOD Delay
0A>Board 8 C0 NPB XPT Test
0A>Board 9 C0 NPB Loopback Exit Test
0A>    Board 9 Loopback Exit Test
0A>    Board 9 Marking NPB Test
0A>Board 9 C0 NPB MQH Test
0A>    Board 9 Check BDA
0A>    Board 9 C_0 NPB MQH
0A>TEST FAILED - C0 NPB MQH.C_0 NPB MQH ID 119.2 LED 0x77
0A>Store to MQH DDR caused caused unexpected trap or interrupt; CC ISR =
0000800
0A>Board 9 C0 NPB IO Ring Test
0A>    Board 9 Verify IO Ring Test
0A>Board 9 C0 NPB Delay Test
0A>    Board 9 TOD Delay
0A>    Board 9 TOD Delay
0A>Board 9 C0 NPB XPT Test
0A>Board 6 C1 NPB Loopback Exit Test
0A>    Board 6 Loopback Exit Test
0A>    Board 6 Marking NPB Test
0A>Board 6 C1 NPB MQH Test
0A>    Board 6 Check BDA
0A>    Board 6 C_1 NPB MQH
0A>    Board 6 MQH Registers Test
0A>    Board 6 MQH Initialization
0A>    Board 6 Enable ECC
0A>    Board 6 Memory Test
0A>    Board 6 Config Memory Available
0A>     Config Board = 0MB, Config Total = 128MB
0A>Board 6 C1 NPB IO Ring Test
0A>    Board 6 Verify IO Ring Test
0A>Board 6 C1 NPB IO Test
0A>    Board 6 Check BDA
0A>    Board 6 C_1 NPB IOC
0A>    Board 6 IOC Registers Test
0A>    Board 6 IOC XDBus Tags Test
0A>    Board 6 IOC Sbus Tags Test
0A>    Board 6 IOC Cache RAM Test
0A>Board 6 C1 NPB SBI Test
0A>    Board 6 SBI Initialization
0A>    Board 6 SBI Registers Test
0A>    Board 6 SBI Initialization
0A>    Board 6 SBus Interrupts Test
0A>Board 6 C1 NPB SBUS Cards Test
0A>    Board 6 SBI Initialization
0A>    Board 6 Checking for SBUS cards
0A>Board 7 C1 NPB Loopback Exit Test
0A>    Board 7 Loopback Exit Test
0A>    Board 7 Marking NPB Test
0A>Board 7 C1 NPB MQH Test
0A>    Board 7 Check BDA
0A>    Board 7 C_1 NPB MQH
0A>    Board 7 MQH Registers Test
0A>    Board 7 MQH Initialization
0A>    Board 7 Enable ECC
0A>    Board 7 Memory Test
0A>    Board 7 Config Memory Available
0A>     Config Board = 0MB, Config Total = 128MB
0A>Board 7 C1 NPB IO Ring Test
0A>    Board 7 Verify IO Ring Test
0A>Board 7 C1 NPB IO Test
0A>    Board 7 Check BDA
0A>    Board 7 C_1 NPB IOC
0A>    Board 7 IOC Registers Test
0A>    Board 7 IOC XDBus Tags Test
0A>    Board 7 IOC Sbus Tags Test
0A>    Board 7 IOC Cache RAM Test
0A>Board 7 C1 NPB SBI Test
0A>    Board 7 SBI Initialization
0A>    Board 7 SBI Registers Test
0A>    Board 7 SBI Initialization
0A>    Board 7 SBus Interrupts Test
0A>Board 7 C1 NPB SBUS Cards Test
0A>    Board 7 SBI Initialization
0A>    Board 7 Checking for SBUS cards
0A>Board 8 C1 NPB Loopback Exit Test
0A>    Board 8 Loopback Exit Test
0A>    Board 8 Marking NPB Test
0A>Board 8 C1 NPB MQH Test
0A>    Board 8 Check BDA
0A>    Board 8 C_1 NPB MQH
0A>    Board 8 MQH Registers Test
0A>    Board 8 MQH Initialization
0A>    Board 8 Enable ECC
0A>    Board 8 Memory Test
0A>    Board 8 Config Memory Available
0A>     Config Board = 0MB, Config Total = 128MB
0A>Board 8 C1 NPB IO Ring Test
0A>    Board 8 Verify IO Ring Test
0A>Board 8 C1 NPB IO Test
0A>    Board 8 Check BDA
0A>    Board 8 C_1 NPB IOC
0A>    Board 8 IOC Registers Test
0A>    Board 8 IOC XDBus Tags Test
0A>    Board 8 IOC Sbus Tags Test
0A>    Board 8 IOC Cache RAM Test
0A>Board 8 C1 NPB SBI Test
0A>    Board 8 SBI Initialization
0A>    Board 8 SBI Registers Test
0A>    Board 8 SBI Initialization
0A>    Board 8 SBus Interrupts Test
0A>Board 8 C1 NPB SBUS Cards Test
0A>    Board 8 SBI Initialization
0A>    Board 8 Checking for SBUS cards
0A>Board 9 C1 NPB Loopback Exit Test
0A>    Board 9 Loopback Exit Test
0A>    Board 9 Marking NPB Test
0A>Board 9 C1 NPB MQH Test
0A>    Board 9 Check BDA
0A>    Board 9 C_1 NPB MQH
0A>
 *** System Watchdog Reset ***
0A>
-------------- Error Log Analysis for Board 0 --------------
0A>
 *** System Watchdog Reset ***
0A>
-------------- Error Log Analysis for Board 0 --------------
0A>WARNING: System Watchdog occured while in Error mode.
0A>C0 BP Check Test Caused System Watchdog Reset LED = 0000005B
0A>
 *** System Watchdog Reset ***
0A>
-------------- Error Log Analysis for Board 0 --------------
0A>C1 BP Check Test Caused System Watchdog Reset LED = 00000060
0A>