[rescue] Perverse Question

[Dave McGuire]

On Monday, June 9, 2003, at 01:55 PM, Jonathan C. Patschke wrote:
>>> If you ever wanted to play with a RISC machine at a really low level,
>>
>> Microchip sells several lines of RISC chips that I've done 
>> development on,
>> and I'm trying to get a job based partly on that experience. Or maybe 
>> those
>> aren't considered "real" RISC machines?
>
> Pretty-much anything that's strictly load-store is considered RISC,
> IIRC.

   While many RISC architectures are load/store, I really don't think 
that can be considered the benchmark with any degree of fairness.  (not 
that I can do much better, mind you)

   I'd say "no microcode" is a big qualifying factor...many RISC 
architectures decode instructions directly rather than implementing 
them via microcode.  Pipelining too.

   Though the term bugs me for some reason, it's sometimes useful to 
make the distinction between RISC and "post-RISC"...where post-RISC 
architectural features are things like speculative execution and branch 
prediction.

            -Dave

--
Dave McGuire             "I've grown hair again, just
St. Petersburg, FL           for the occasion."       -Doc Shipley