[rescue] pursuing a VAX

Joshua D Boyd jdboyd at cs.millersville.edu
Wed Dec 11 01:45:08 CST 2002


On Wed, Dec 11, 2002 at 02:35:27AM -0500, Joshua Snyder wrote:
> On Tue, 10 Dec 2002, Joshua D Boyd wrote:
> 
> > On Tue, Dec 10, 2002 at 02:06:33AM -0500, Joshua Snyder wrote:
> >
> > > Not sure if any of it is true but seems to make sense when thinking about
> > > adding SMT to the P4, you want to have wide issue cpu so the threads have
> > > plenty of resources.  As it is now it seems like best reason to enable
> > > SMT(no I am not going to call it hyper-threading... ) on the P4 is to make
> > > up for the poor utilization caused by the long pipeline and slow filling of
> > > the trace cache.  If the P4 had the extra resources we might see a better
> > > performance when using SMT.
> >
> > But where do the P4 Xeons fit into all of this?  That's the main P4 I use.
> 
> As far as I know the only difference between the Xeon's and the normal P4
> was dual processor support and SMT(hyper-threading).  But now that the
> normal P4(3.06Ghz and above) supports SMT the only real difference is dual
> processor support.

First, not all P4 Xeons had SMT support, to my understanding.  On P3
Xeons, the L2 cache was faster and (usually)larger than regular P3s, so
maybe that is in play here also. 

Second, you can't have a dual P4?  That stinks.  Why the change?

-- 
Joshua D. Boyd



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