[SunRescue] Pointer to SS2 FM info pages?

[Gregory Leblanc]

> -----Original Message-----
> From: BSD Bob the old greybeard BSD freak
> [mailto:bobkey at weedcon1.cropsci.ncsu.edu]
> Sent: Wednesday, July 12, 2000 3:35 PM
> To: rescue at sunhelp.org
> Subject: Re: [SunRescue] Pointer to SS2 FM info pages?
> 
> > > I was needing
> > > a pointer to the url for the FEH pages on it.  I vaguely 
> > > remember a .jp
> > > site that had some of the board diags that show the ram/jumper/etc
> > > locations.  Anyone have that url handy?  If not, anyone have 
> 
> > What's wrong with the SHR?  :-)  I've been doing a lot of 
> work on mine,
> > testing out various ram things.  Assuming that you're using 
> 9-pin SIMMs,
> > start from the group of slots closest to the SBUS slots, 
> and fill straight
> > forward.  On my machine, you have to fill the bank closest 
> to the SBUS slots
> > first (which means 4-SIMMs, but the SHR has a nice ASCII 
> diagram), but after
> > that it doesn't seem to matter how the banks are filled.  
> Mixing 3-chip and
> > 9-chip SIMMs does not work, nor does mixing "Logic-Chip 
> Parity" and "True
> > Parity" 3-chip SIMMs.  Yes, I am working on writing all of 
> this down...
> 
> I always use 9 chips in sunstuff.....(doesn't everyone?)... (:+}}...
> Although I have heard some 3 chip stuff works.

Well, I'm cheap, and I wanted to squash some of those rumors.  That's why I
posted about the SS1/1+ the other day.  I'll be getting back to people as
soon as I can.

> After some hectic webcruising, I finally found the reference page
> I was looking for.... alas it is in Japanese or the html is screwed.

I think Japanese.  I'll see if any of the students around here can translate
for me.

> Anyway, if I am reading the figure correctly:
> 
>   http://www.portnet.co.jp/JIS/techical/WS/sun4_75.html
> 
> shows the ram cycling by fours in the two rows of chips.
> My machine seems to have 0 and 1 filled in each bank, with
> 3 and 4 open.  IFF I am interpreting how the sequence cycles,
> I need to install all four 3 bank locations first, which
> is a little different from what you seem to be suggesting,
> and then add the 4 bank locations second?
> 
> Can someone confirm that?  I don't want to muck up the ram
> positions.

We're talking about the SS2 aka 4/75, right?  If so, then I had to fill bank
0 first, then I could fill the other banks in any order (well, there's one
order I haven't tried yet).  

> The SS1 (4/60) seems to be entirely different from this (SS2 or 4/75).

I guess I'll see about that a bit later, when I've got one of those here to
play with.

> Almost confusing, and a good reason to have the actual FEH diagrams.

True, but that doesn't always help, as they may say how things are supposed
to work, not necessarily how they do work.

> Also, IFF I am out of 4 meg SIMMs, can the last row of bank 4 SIMMs
> be filled in with 1 meg SIMMs, or will it require 4 meg SIMMs?
> The IPX, for example can mix and match, but it requires the high
> density ram first.

My system didn't care where the high density SIMMs were, as long as I had
the same size SIMMs filling a given bank (i.e. bank 0 was all 1MB SIMMs,
bank 1 was all 4MB SIMMs, etc).  I'll have to try to do some more testing
with that later, I hadn't thought of trying that...
	Grego