[geeks] examples of vector processors (vs scalar

[dave at cca.org]

mcguire at neurotica.com writes:

>  This is true, although it isn't a requirement of the architecture.  To
>mitigate this, Cray systems also implement vector chaining, a facility
>by which one vector operation can start before the previous one has
>finished.  If things are set up correctly, one can set up a chain of
>vector operations and not lose a single cycle.  Cray's compilers are
>very good at this, and wring every last cycle out of those processors
>for truly amazing performance.

If the data is laid out properly in memory, can you keep the
vector units working continuously, while streaming all the
data in and out to memory?

Also - did some of the Crays have multiple FP units, so
they could actually run some of the vector elements in
parellel? Is that what the SV1's CPU configuration thing
is all about?

------ David Fischer ------- dave at cca.org ------- http://www.cca.org -------
---------- "Anything Jesus can do, I can do better." - The Locust ----------