[geeks] examples of vector processors (vs scalar

[Dave McGuire]

On August 5, dave at cca.org wrote:
> If I understand the Crays correctly, the fact that one instruction
> operates on a large array does *not* mean that all the elements
> are actually calculated simultaneously. It's actually just a
> really really optimized loop, initiated by a single instruction.
> Obviously that lets you tune the hardware to keep all the stages
> of the pipeline running optimally, but it isn't what would be called
> "SIMD" in the MPP world.

  This is true, although it isn't a requirement of the architecture.  To
mitigate this, Cray systems also implement vector chaining, a facility
by which one vector operation can start before the previous one has
finished.  If things are set up correctly, one can set up a chain of
vector operations and not lose a single cycle.  Cray's compilers are
very good at this, and wring every last cycle out of those processors
for truly amazing performance.

        -Dave

-- 
Dave McGuire                     "I haven't worn pants in 14 months!"
St. Petersburg, FL                                   -Pete Wargo