[rescue] Happy New Year! RIP, Sun/Solaris...

Peter Corlett abuse at cabal.org.uk
Wed Jan 5 11:11:36 CST 2011


On Wed, Jan 05, 2011 at 11:29:36AM -0500, Patrick Giagnocavo wrote:
> On 1/5/2011 11:06 AM, Peter Corlett wrote:
[...]
>> Context switches are extremely expensive operations and best avoided.
>> Your shiny quad core box takes about the same time as a 6502 to do a
>> context switch.
> Source? or simple back of the envelope math showing it?

It was an amusing fact I was told by a low-level hacker, although he was
specifically referring to interrupt latency.

Up to a point, you can intuit it. An interrupt or system call involves
stopping the world on the CPU, flushing the pipeline, storing state, and
starting again. The Pentium 4 is really bad at this due to the very large
pipeline, which is why it is often much slower than the raw MHz figure would
suggest. Odds are that this is going to involve waiting on RAM as well,
adding latency. RAM latency hasn't improved all that much over the years
with most of the performance improvements in improved bandwidth, so stopping
the world and starting somewhere new and unexpected in RAM is going to
require many wait states.

There are also benchmarks of dubious reliabilty that you can find on Google.
However, the general trend I was seeing is that that a no-op syscall
typically takes a single-digit number of microseconds.

A 6502 takes of the order of ten microseconds to do a BRK + RTI.


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