[rescue] Re: Wanted - Dual (or quad) PPro

[Gavin Hubbard]

>On Fri, Feb 21, 2003 at 08:00:02PM +1300, Gavin Hubbard wrote:
>> That sounds like a really interesting system Sridhar. How on earth did you
>> get the PIII chips to go above 2-way? I thought the PII & PIII only
>> supported single-bit processor IDs (unlike the PPro which had a two-bit
ID).
>
>I'm not positive, but I'm guessing that the chipset handles it.  It
>perhaps does something like make the first cpu think it is proc 0,
>and it sees all the other procs as proc 1.  All the other procs then
>think they are proc 1 and see the others as proc 0.  And beyond that the
>chipset sorts things out to make it actually work correctly.
>
>But, as I said, that's just a guess.  I do know that ALR used to do
>something like that PPro machines beyond quad processors.

On my Unisys HS/6 (6-way ALR revolution 6x6) there had two banks of three
processors, installed on two separate riser boards. Three IDs are given to
the processors on the first board and the the fourth ID references the
second board. Quite a neat solution as the PPro only handles 4-way MP
natively. 

But speaking of massively multi-processor PPro systems; Unisys also
produced the XS/6 system. The first generation could handle ten PPro CPUs
and the second generation could handle 12. Then of course you have the
massive PPro/Xeon Sequents. But from the examples I've seen, they use quads
as a basic building block (the quads are then stiched together using a
proprietary bus/chassis interlink). Then of course you have the first of
the ASCI super-computers which I believe used thousands of PPro CPUs.

Regards,

Gavin