[rescue] ss2 under load

Kurt Mosiejczuk kurt at csh.rit.edu
Thu Feb 14 15:47:48 CST 2002


On Thu, 14 Feb 2002, Joshua D Boyd wrote:

> > The 2 and the IPX are almost equivalent.  The main difference is the IPX
> > has 8 hardware contexts and the 2 has 16.  Other than that, they are
> > almost identical architecture wise.

> I'm not exactly sure what those hardware contexts are (is that the number of
> windows in the register file?), but I was under the impression that more meant
> better under heavy load.

Okay, you made me look it up in a book =)

To quote Sun Performance and Tuning (2d edition) by Adrian Cockroft:
(page 267)

"A hardware context can be thought of as a tag on each PMEG entry in the MMU
that indicates which process that translation is valid for.  The tag allows
the MMU to keep track of the mappings for 8, 16 or 64 processes in the MMU,
depending on the machine.  Then a context switch occurs, if the new process
is already assigned to one of the hardware contexts, then some of its mappings
may still be in the MMU and a very fast context switch can take place."

It goes on to say that if you stay under the number of HW contexts, it's
actually faster than a TLB system (which is what most things use, including
sparcs after the sun4c era).  But if you are on an IPX with 8 contexts and
have like 16 active processes, it's got to start purging them out and loading
the new active process.  Basically, it's an MMU cache =)

And for those who are acronym impaired:

MMU = Memory Management Unit
PMEG = Page Map Entry Group
TLB = Translation Look-aside Buffer
IPX = Uh, that's just a product name

Hope this helps.  Granted, if you aren't at all familiar with how
virtual memory works, you may just be more confused now... =)

--Kurt



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