[rescue] IBM :: Different

[George Adkins]

On Wednesday 13 February 2002 05:17 pm, you wrote:
> On Wed, 13 Feb 2002, George Adkins wrote:
> > > These aren't mainframes.  These are RS/6000's.  This is *really* a
> > > 128MB SRAM cache.  Big ballsy systems.  Microprocessor-based.
> >
> > Yes, Yes, I apologize for deigning to write the word 'mainframe'  would
> > you be offended or otherwise manage to find some fault if I said 'system'
> > instead? (Of course you would, please note in advance the lack of
> > capitalization when using the word system here, I meant in no way to
> > imply System, as in System 360 or System 390, it was intended to mean
> > system as in the generic term referring to 'computer system'.)
>
> You still didn't get what I'm trying to say.  This is not a multi-tiered
> main memory architecture.  That is a 128MB transparent Static RAM *cache*.
> A *real cache*.  With a hit-detect algorithm and everything.  This is a
> UNIX box running on microprocessors.
>

Yes, I do.  I did before. nothing has changed.  I UNDERSTAND.

Look, I wrote:
> Yes, but remember, for IBM Mainframes compared to everyone else, this is
> like having a 2 or 4 processor server with 512K or 1 meg cache each, with 
> 8 megs of unified L2 cache for the processors and 128 megs of buffer RAM
> between the Proc and a 2GB main RAM.  (no doubt all kickass fast...)

Which part of 'buffer RAM between the Proc and a 2 gig main RAM' implied that 
I was saying this was a multi-tiered memory archetecture?

and no, this is not an invitation to debate the subtle differences between a 
buffer and a cache,  I didn't say it was *a* buffer, only that it buffered 
access to the 'main RAM'.

Please, stop attempting to nitpick anything I post to death...