[rescue] Identifying Super Sparc II CPU

[James Lockwood]

On Wed, 13 Jun 2001, Mike Nicewonger wrote:

> Cannot post pic right now.
>
> Module-info says:
>
> 40 MHz Mbus

I assume this is in a 40MHZ max Mbus system?

> 25 MHz Sbus
> CPU0 89 MHz SuperSparc II / SuperCache 4.x

Cool!  The SM81 was originally supposed to be a 90MHz part, but heat
concerns (and, I believe, low yields from TI) caused them to back it down
to 85MHz.  I wonder what exactly it is you've got there.

-James