[SunHELP] SPARC Server 20...

[Kurt Mosiejczuk]

On Tue, 12 Feb 2002, Michael Vang wrote:

> Throwing logic and sanity to the wind, I went ahead and bought it...

I think many of us have done that before =)

> I swear this thing has to weigh close to 200 pounds... I never imagined
> that a computer could be built so well... This thing makes both my U5
> and X1 look like toys... My favorite part are the sleds for the hard
> drives... I've never seen something like that in person before... I must
> have removed and replaced them at least a dozen times...

Yeah, the X1 and U5 are Sun trying to compete with cheapie PC makers...
and while they are better than most clones, it does show.

> I've been looking all over the Internet today trying to figure this
> out... The only guess I can hazard is maybe the difference in cache
> makes 2x75MHZ faster than 4x100MHZ... Can someone point me to some
> documentation for this?

Well, part of your problem getting by this is because you are assuming
that it's like comparing a Pentium @ 75Mhz to a Pentium @ 100Mhz.

TI did the supersparcs, Ross did the hypersparcs.  It's fairly late, so
I'm not going to look up the chapter on the CPU architectures right now.
But I seem to recall it has to do with what workload the CPU is optimized
for AND the fact that (and I may be recalling these details incorrectly)
the Supersparcs can issue 3 (maybe 4?) instructions per clock cycle and
the Hypersparcs 2.  I also seem to recall many of the instructions finish
quicker on a Supersparc.

Now, I seem to recall that if you were doing pure number crunching that
the Hypersparcs might perform better.

Oh, and those SM71s (75Mhz) have a 1 Megabyte cache.  Whereas the Ross
CPUs (those dual 100Mhz) only have 256k or maybe 512k.  That right
there does make a BIG difference.  Especially under SMP.

--Kurt