[SPARCbook] 3GX: Reboot wedged at 0C0

[patl at phoenix.volant.org]

On 12-Feb-00 at 14:53, Greg (greg at cheers.Bungi.COM) wrote:
> That's a watchdog timer but it's not a Watchdog Reset nor do most Sun-based
> machines have watchdog timers.  There is a kernel debugging feature that
> acts sort of like one but it's not normally enabled.
> 
> A Watchdog Reset on SPARC processors happens when a trap occurs when traps
> are disabled. The amount of code that runs with traps disabled tends to be
> small and the code tends to be well-debugged.  So a watchdog reset,
> especially one that happens before the kernel is loaded, is most likely due
> to flaky hardware.  Watchdog Resets can also be caused by software bugs so
> if they start happening after the kernel has been changed (patches, new
> drivers, etc.) then you need to suspect the kernel as well.

Since this is happening after wedging early in the boot sequence,
I suspect that it is a side-effect of being stuck at the 0C0 state
for too long.


-Pat