[rescue] Sun 711
David Passmore
dpassmor at sneakers.org
Thu May 2 12:47:05 CDT 2002
On Thu, May 02, 2002 at 10:23:51AM -0700, James Lockwood wrote:
> Look at STREAMs numbers. 300MB/s both coming in and going out will sap
> half of your RAM bandwidth, minimum. This is not insignificant. The
> clocks are not appreciably higher in new PC RAM technologies.
> Synchronously clocked data transfers per clock have gone up, though.
Look at the specs on RAMBUS. I dare you.
> Other thoughts: is this going through a windowing system? Even if it can
> be blitted to the screen "DGA-style", does it have to be done line by
> line? This kind of start/stop behaviour is poison to modern memory
> systems, they heavily rely on main RAM being predominantly used for
> sequential fills.
Since Shawn did not specify anything more specific than the fact that it
must show up on the screen at 24fps, I would imagine you can take advantage
of any kinds of extensions your framebuffer subsystem has to offer.
> I've built servers to handle this kind of throughput and I stand by my
> statement.
I would think you would know better than to try and pull the 'i've done X
therefore I must be correct' trump card on this list. Someone somewhere has
done much larger implementations and they might be the person you're arguing
with.
> You're on x86, no DVMA, and the framebuffer is probably on a different
> channel (AGP). CPU has to intervene to blast data out to the framebuffer
> every 1/24 second (realistically you need more margin), so you can't use
> huge DMA transfers locking everything up. You pay an interrupt overhead
> per transfer, and it becomes highly significant once you have a few
> hundred MB/s flowing. Big database servers smack into this all the time,
> again running only one or two tasks. Saturate a 64/66 PCI bus sometime
> and watch your interrupt usage.
I fail to see how the lack of DVMA will significantly hamper the performance
of this task, perhaps you can enlighten me. The amount of CPU intervention
needed to initiate these DMA transfers (to/from PCI and AGP) I would think
to be minimal. What do you mean by DMA transfers 'locking everything up'?
Isn't the whole point of this exercise to move data around?
As for the analogue to large database servers (I assume you're talking about
OLTP-type applications), the dataset is very different and so the movement
of that data within the system is different. We're talking about very large
sequential transfers.
> This is where mainframe channel controllers capable of offloading entire
> lists of I/O operations shine.
Sure. But your typical mainframe doesn't have a framebuffer, either. :)
David
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