[rescue] Help!

[David Venable]

I have a Sparc 2, and have created a serial connection, the output looks
like this


Parity/Memory Control Registers Bit Test
36-bit SIMM Parity Test
33-bit SIMM Parity Test
Interrupt Register Test
Software Interrupt Level 1 Test
Software Interrupt Level 4 Test
Software Interrupt Level 6 Test
NVRAM Access Test
TOD Clock Oscillator Running
TOD Registers Test
Cache Statistics Bit Update Test
Cache Doubleword-Alignment Read Miss Test
Cache TAG Comparator Read Miss Test
Cache Non-Cacheable Read Miss Test
Cache Read Miss Parity Test
Cache Doubleword-Alignment Read Hit Test
Cache Byte-Alignment Read Hit Test
Cache Read Hit Context Test
Cache Read Hit MMU Invalid Test
Cache Doubleword-Alignment Write Hit Test
Cache TAG Comparator Write Hit Test
Cache Write Hit Context Test
Cache Write Hit/Miss (Cacheable) Test
Cache Write Hit/Miss (Non-Cacheable) Test
Cache Write Miss Test
Software Context Flush Test
Software Segment Flush Test
Software Page Flush Test
Hardware Context Flush Test
Hardware Segment Flush Test
Hardware Page Flush Test
Unconditional Block Flush Test
FPU Misaligned Register Pair Test
FPU Single-Precision Test
Single-Precision FPU Exception (Invalid Result) Test
Single-Precision FPU Exception (Overflow) Test
Single-Precision FPU Exception (Underflow) Test
Single-Precision FPU Exception (Divide-by-0) Test
Single-Precision FPU Exception (Inexact Result) Test
Single-Precision FPU Exception and Timeout Test
Single-Precision FPU Exception and Data-Access Trap Test
Single-Precision FPU Exception and Misalignment Test
Single-Precision FPU Exception and Asynchronous Trap Test
FPU Double-Precision Test
Double-Precision FPU Exception (Invalid Result) Test
Double-Precision FPU Exception (Overflow) Test
Double-Precision FPU Exception (Underflow) Test
Double-Precision FPU Exception (Divide-by-0) Test
Double-Precision FPU Exception (Inexact Result) Test
Double-Precision FPU Exception and Timeout Test
Double-Precision FPU Exception and Data-Access Trap Test
Double-Precision FPU Exception and Misalignment Test
Double-Precision FPU Exception and Asynchronous Trap Test

Setting Segment Map
Setting RAM Parity Mode
 Mode set to 36-bit
Sizing Memory
Mapping ROM
Mapping RAM
Probing /sbus at 1,f8000000 at 0,0  dma esp sd st le
Probing /sbus at 1,f8000000 at 1,0  Nothing there
Probing /sbus at 1,f8000000 at 2,0  cgsix
Probing /sbus at 1,f8000000 at 3,0  Nothing there
Can't open input device.
Memory address not aligned
Type b (boot), c (continue), or n (new command mode)
>Data Access Exception
Type b (boot), c (continue), or n (new command mode)
>Data Access Exception
Type b (boot), c (continue), or n (new command mode)
>Data Access Exception
Type b (boot), c (continue), or n (new command mode)
>Data Access Exception
Type b (boot), c (continue), or n (new command mode)
>Data Access Exceptio

Any ideas?